3 different pulse widths logic signal

[PrescottDan]

What is the name or what kind of signal is this? address signal?

It has 3 different pulse widths

Why would you want to have 3 different pulse widths?

It's on a logic buss rail

 

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A signal taken out of context is meaningless.

1. Is there a clock that is associated with the signal?
2. Is the signal part of a bus with other signals (i.e. maybe there is a relationship to other signals on the bus)?
3. Is the signal a serial line?
4. Is the signal a PWM signal.
5. ????

Unless we know what the signal is you are looking at any of the above including the ???? could the reason the signal looks that way.

Regards

 

[PrescottDan]

1. Is there a clock that is associated with the signal?
2. Is the signal part of a bus with other signals (i.e. maybe there is a relationship to other signals on the bus)?
3. Is the signal a serial line?
4. Is the signal a PWM signal.

So any of these 4 can make this type of signal?

Mostly I see just have seen to measure logic waveform signals that have T1 and T2

I don't see logic waveforms much that has different pulse widths per pulse like T1, T2, T3 are all different

This is not a common normal TTL or CMOS logic signal

 

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So any of these 4 can make this type of signal?

Mostly I see just have seen to measure logic waveform signals that have T1 and T2

I don't see logic waveforms much that has different pulse widths per pulse like T1, T2, T3 are all different

This is not a common normal TTL or CMOS logic signal

Not a common signal? What is the definition of a common signal. I've never seen one in my lifetime (well maybe a clock could be considered a "common normal" signal).

I could show you even more complex signals from any simulation of a logic circuit that would make no sense at all being out of context.

Oh look this is not a "common normal" signal it's toggling all wrong. (Let me clue you in to something...in the context of the design I'm simulating it's toggling correctly based on the control logic in the design)

You need to understand you can create any waveform you want from logic.
As an example an extremely simple way to produce the waveform in your original post would be to do the following:
Use a shift register with a value of 011111111111111110000000000111110 and a clock enable with pulses every 10 us. Pad with as many or as few zeros on both ends as required.

 

[PrescottDan]

Most logic signals I have seen that are TTL or CMOS have only one T1 on time/state and OFF time/state T2

What Logic Signals besides TTL or CMOS have T1, T2, T3, etc. ? what are these logic signals called please?

 

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So you tell me what kind of signal you are looking at that is: TTL or CMOS that has only on T1 on time/state and OFF time/state T2? You seem to think it's a common signal that everyone should know about. Well I don't know what signal it is, and given the fact that I'm the only one that has responded to this thread indicates to me that nobody else knows either. It bears repeating: A signal taken out of context is meaningless.

You seem to think because one (or a few) instances of signals you've looked at exhibit some specific behavior all signals are supposed to behave this way. A signal could potentially have a waveform with an extremely large variation in high/low pulse widths. Take for instance a 32-bit LFSR. Any single bit position picked will have a pseudo random sequence of 0's or 1's output from it, and I guarantee it won't look like your "common" (every other signal has to look like a T1-T2 pulse) signal.

I also don't understand what TTL or CMOS has anything to do with your T1, T2, T3, etc pulse widths observations. TTL and CMOS are logic families (i.e. the transistor circuit topology that makes a circuit behave like AND/OR/NOT/XOR etc logic gates) with a specific set of voltage level requirements. You could just as easily generate your "waveform" with BiCMOS, HSTL, SSTL, ECL, PECL, LVPECL, etc.

So explain what you mean by the logic family and pulse sequence not being normal or what logic family generates such a sequence. It's certainly not at all clear what your issue is with the signal (waveform) you drew.

I seriously wonder if you have any grasp on what digital logic is? Have you had any instruction or read any books on digital logic? Do you understand what logic families are? Do you understand what a scope shows you when it displays a signal? Do you understand logic levels 0/1, true/false, Boolean algebra? If what I'm saying doesn't make sense to you, then you need to do some studying of the basics first.

Regards

 

[PrescottDan]

Most TTL and CMOS logic I have been around has periodic only 2 states , on/off stages T1 and T2

The Pulse sequence is only 2 states repeating

This is the only TTL and CMOS circuits I have come across mostly

The Pulse Sequence has 2 states and Only 2 pulse widths for the On time and Off time