// counter has a synchronous
//active-high reset and it is a negative edge triggered synchronous counter.
module updown_synccounter (clk, reset, select, out);
input clk, reset, select;
output [2:0] out;
reg [1:0] count;
assign out = {count,~select};
always@ (negedge clk)
begin
if (reset==1'b1)
count <= {2{~select}};
else if (select==1)
count <= count+1;
else
count <= count-1;
end
endmodule // updown_synccounter
module test();
reg clk;
reg reset;
reg select;
wire [2:0] out;
updown_synccounter updown_synccounter(.out (out[2:0]),
.clk (clk),
.reset (reset),
.select (select));
initial begin
clk = 1'b0;
reset = 1'b1;
select = 1'b1; // count up even
repeat(3) @(posedge clk);
reset = 1'b0; //start counting
repeat(20) @(posedge clk);
reset = 1'b1;
select = 1'b0; // count down odd
repeat(1) @(posedge clk);
reset = 1'b0;
repeat(20) @(posedge clk);
$finish();
end // initial begin
always #5 clk = ~clk;
endmodule // test