Matched net lengths for DDR ram, address bus v's data bus

[abaz]

Hi all
I'm trying to route a couple of ddr ram chips to a processor, currently all my data lines are matched in length and the address lines are also macthed to each other, however my address lines are twice as long as my data lines. Will this give me timing problems in, for example, setup and hold times etc...
Do my data lines have to be matched in length to my address lines?

 

[loosemoose]

see app notes here, might be helpful:

**broken link removed**

Also see Jedec.org for DRRx specifications. I believe they are free.

 

[marce]

Some previous threads:
https://www.edaboard.com/threads/38386/
https://www.edaboard.com/threads/162136/
https://www.edaboard.com/threads/218559/

 

[abaz]

Thanks for the links guys, looks like I need to worry about more than just matched net lengths...