Mar 23, 2006 #1 S stevepre Member level 4 Joined May 10, 2001 Messages 78 Helped 1 Reputation 2 Reaction score 1 Trophy points 1,288 Activity points 595 ncsim dumping arrays I've been using VHDL for too long and don't know if 2-D array (verilog) is synthesizable or not...
ncsim dumping arrays I've been using VHDL for too long and don't know if 2-D array (verilog) is synthesizable or not...
Mar 23, 2006 #2 Y yuenkit Advanced Member level 4 Joined Jan 20, 2005 Messages 107 Helped 6 Reputation 12 Reaction score 1 Trophy points 1,298 Activity points 1,047 yes, it's synthesizable
Mar 23, 2006 #3 S stevepre Member level 4 Joined May 10, 2001 Messages 78 Helped 1 Reputation 2 Reaction score 1 Trophy points 1,288 Activity points 595 Thanks. And I just confirm that. However, is there an easy way to dump the 2-D array in simulation (NCSIM)? In Modelsim, it's right there. For VCS, I also know the way. But for NCSIM?
Thanks. And I just confirm that. However, is there an easy way to dump the 2-D array in simulation (NCSIM)? In Modelsim, it's right there. For VCS, I also know the way. But for NCSIM?
Mar 24, 2006 #4 L linuxluo Full Member level 6 Joined Jul 26, 2002 Messages 331 Helped 7 Reputation 14 Reaction score 3 Trophy points 1,298 Activity points 2,514 hi, as to ncsim, I think no way