FvM said:A crystal oscillator should basically have the accuracy required for a clock. An error of e. g. 50 ppm would result in a deviation 4 sec/day, that's not very good, but should be acceptable. You can achieve higher accuracy by tuning a capacitor in the crystal circuit or use a more accurate oscillator.
FvM said:The CD4060 suggestion was basically motivated by reducing part count. A single /2 divider should be better implemented in CPLD. On the other hand, you can build the complete clock from CMOS parts as many people did "in the last millenium".
echo47 said:I assume you are building a 4-digit HH:MM clock, and not a HH:MM:SS clock. Connecting 28 LED segments directly to the CPLD consumes 28 of the 36 available macrocells. (Or somewhat fewer if you don't need all the segments in the left digit.) You'll need six more macrocells to implement the divide-by-60 seconds counter. That doesn't leave enough macrocells to build a divide-by-32768 counter. I don't think there's any way to cram an entire clock project into a tiny XC9536.
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