14 bit adc output to 5 bit data conversion in VHDL

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prem ranjan

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I am having 14 bit ADC data which is in 2's complement format.
I require to convert in 5 bit format using vhdl language. What is the easiest way of doing it apart from using if then else statements comparing magnitude?
Consider the input data to be in two cases unsigned and signed.
 

Hi,

Maybe I misunderstand..

But if you want to generate 5 (linear. Not logarithmic like u-law, A-law) bits from a 14 bit ADC ... then just use the 5 upper bits and ignore the 9 lower significant bits.

Klaus
 

But if you want to generate 5 (linear. Not logarithmic like u-law, A-law) bits from a 14 bit ADC ... then just use the 5 upper bits and ignore the 9 lower significant bits.
Click to expand...
May be the question is that trivial, may be some specific coding is intended. The OP missed to ask a clear question.
 

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