You will have touse VCO controlled by a PLL loop (example NE564: **broken link removed** ). First you will need to reduce the frequency to, say 2MHz (divisinon by 3 and 2 - to provide 50% duty ratio) and then use this signal as reference to PLL. As signals from VCOs are in square wave form you will need to implement filtration mentined in previous post ..
I suspect your clock is square wave. Better stability is achieved if 12M is divided with 3 to get 4M and then mixed 12M and 4M to get 8M. By filtering you will get sine wave signals.