How to draw layout of spiral inductor in cadence?

[viviana]

inductor layout

I tried to draw a layout of spiral inductor in virtuoso, it is not recoganized as an inductor. Do I need any other tools? or did I make any mistakes? thanks!

 

[colombo2]

how to draw spirals

The easiest way to draw an inductor is to get ASITIC to draw it for you as CIF and import it into vituoso. You need some logical layer under the inductor to get the extractor to realize that it is a circuit that refers to a particular schematic that you need to prepare.

Colombo2

 

[cqmyg5]

pcell

If you mean "not recoganized" is ran through LVS, i think you may add a INDDUMMY layer over it.

 

[alcohol]

how do we layout a inductor

normal layout is use Top metal
if you need pass LVS you must add INDDUMMY layer over it
and modify you lvs command match layout and rule !!

 

[dodo]

draw inductor

is there a way to design inductors with TSMC30 process because it does not have any of the layers that have been mentioned??

 

[khouly]

cairo draw spiral

a simple way is to in the schematic replace the inductor with short circuit
it will work
if u donot have the layer that tell the LVS it is an inductor it will see it as a short circuit

khouly

 

[liujs_825]

inductor short circuit

I want to layout a inductor of 7nH using SMIC 0.18. Does it possible, and can any body recommmend some good method and any book. Thanks

 

[Learn2Fly]

spiral-inductor layout

I want to layout a inductor of 7nH using SMIC 0.18. Does it possible, and can any body recommmend some good method and any book. Thanks

The most secure way is to use the devices in PDK provided by the foundry. and I think 7nH is realizable, surely it depends on the quality factor and self-resonant freq. required.

Good luck.

 

[hanm]

cadence diagonal draw

Your inductor cann't be recognised just because your extracted rule.In fact, one metal line or several turn metal is a inductor, of cource the L value and Q should be optimised. For simply,use the pdk foundary provide,that work.

 

[ahmad_abdulghany]

cadence layout

I think that the easiest way is to use a ready made pCell from your kit. Quality factor of on-chip conductors is quite poor.

On the other side, if you're looking forward to make the pCell itself, then, you can draw it using 'Path' command in Virtuoso, and run simulations on your layout to parameterize it, and then write the corresponding SKILL description file.

 

[khouly]

spiral inductor layout cadence lvs

also u need to do some EM simualtion for accurate modeling of the inductor u will use to get the optimum performance

khouly

 

[banumeenakshi]

Hi I need to draw an inductor of 3nH in Cadence. I have the two metal layers done in cadence. But on extraction it does not give me the inductance required. I do not have the IND dummy layer in TSMC0.4um technology that I am using. Help required.

 

[BigBoss]

Hi I need to draw an inductor of 3nH in Cadence. I have the two metal layers done in cadence. But on extraction it does not give me the inductance required. I do not have the IND dummy layer in TSMC0.4um technology that I am using. Help required.

Extraction won't recognize the inductor which you have drawn.Even you use RCLk option of Assura, inductor value will be very far from the reality.
To pass LVS,you can use "bbox" option ( or similar function depending on your tech.file ) to hide this inductor.In this case, LVS will see this component as an open circuited black box and will see only the its pins.

To obtain a precise inductor, its layout should be either transferred onto Momentum (ADS) or should be simulated in RFDE if you have this otion.