1 wire/ Micro lan/ Dallas semiconductor programming VHDL

[stevenendlos]

Hi,
|
| I have trouble programming the 1 wire device. I've an ARM7-TI
| TMS470, Actel FPGA and a 1 wire device. I'm tring to read and and
| write data to the slave(1 wire). I'm using VHDL coding on Actel
| Libero.
|
| 1. Consider the case of reset .In the documentation, it is
| mentioned that after 480us I've to release the bus and go to
| receive mode. From the programming side, does it mean that I've
| to pull the signal low for 480us and force it to high state right
| after 480us. In short, what does the word release mean?
|
| 2. How do i skip the ROM ID part? I only have 1 slave. So, I
| don't need the ROM ID part.
|
| Correct me if I'm wrong. Here are the steps I followed from the
| programming side-
|
| 1. reset- pull it low for 480 and release it(assuming make it
| high).
|
| 2. presence- smaple at 550us and check the signal value. if high,
| no slave...if low slave present.
|
| 3. rom id: How do I skip this part?. THEY SAY IT'S 64 BIT. Do i
| need to send each bit at a time to the slave? I would like to
| skip everthing ion this part to make things simpler
|
| 4. Assuming write 16 bit data of 1's and 0's:
| check if the bit on the data bus is 0 or 1.
| if '0'- initially pull the signal low and make it high after
| 60us. delay 10us and check for the next bit.
|
| if '1'-----same thing......(changing the times)
|
| 5. assume read operation-
| pull the bus low for 6us and make it high after 6us......(becoz
| slave holds it low if it's a zero)....sample the bus after 15us
| and see if it's high or low.... copy the value to the data
| register.

 

[chipseller]

Hi Stevenendios

I have attached the official VHDL for the Dallas one-wire master through a memory-mapped peripheral. I did start trying to implement this as a Smartfusion peripheral and I think it will work with only a few minor mods to make it interface to an APB bus, but I have yet to complete this.

Anyway, I suggest that rather than d-i-y, you use the proper ip.