velu.plg
Member level 5
DDR Memory have 640x400 data. I need to read each 640bits from DDR memory when I get star bit and stored in 640mb internal memory. After getting each 640 bits in a internal memory in need to write this data in to the same DDR with different write location.
Platform : zync ultrascal+
Part: xczu9eg-ffvc900-2-i
Tool :vivado 2016.4
Am new to this design. kindly provide your support and Which Xilinx AXI IP is good for this project and provide the project flow.
- - - Updated - - -
Here AXI READ&WRITE is my part. I need to read 640bit data from input register and write it to 640bits output register.
Platform : zync ultrascal+
Part: xczu9eg-ffvc900-2-i
Tool :vivado 2016.4
Am new to this design. kindly provide your support and Which Xilinx AXI IP is good for this project and provide the project flow.
- - - Updated - - -
Here AXI READ&WRITE is my part. I need to read 640bit data from input register and write it to 640bits output register.