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libraries in modelsim in vhdl

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i have used the following libaries

LIBRARY IEEE;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;
USE ieee.numeric_std.all;

still the error in modelsim shows :

** Error: G:/vhdl code/vhdl code/dwt_main.vhd(30): (vcom-1078) Identifier "UNSIGNED" is not directly visible.

Potentially visible declarations are:
ieee.NUMERIC_STD.UNSIGNED (subtype declaration)
ieee.std_logic_arith.UNSIGNED (type declaration)

** Error: G:/vhdl code/vhdl code/dwt_main.vhd(31): (vcom-1078) Identifier "SIGNED" is not directly visible.

Potentially visible declarations are:
ieee.NUMERIC_STD.SIGNED (subtype declaration)
ieee.std_logic_arith.SIGNED (type declaration)

how to solve it
 

The error is caused by using two conflicting numeric libraries together. If you are using ieee.numeric_std, you can't use ieee.std_logic_arith.
 

FvM said:
The error is caused by using two conflicting numeric libraries together. If you are using ieee.numeric_std, you can't use ieee.std_logic_arith.
Click to expand...

You can use them, as you can directly assign whichever you want. eg:

signal a : numeric_std.unsigned;
signal b : std_logic_arith.unsigned;

Meaning you can now use both libraries in the same file. But why bother? just delete the non-standard std_logic_arith library and your life is made easier.
 

numeric_std and std_logic_arith are standart for Modelsim,but it have to right way in using only one of them.
 

ustinoff said:
numeric_std and std_logic_arith are standart for Modelsim,but it have to right way in using only one of them.
Click to expand...
Actually this should be... Modelsim includes both libraries, the IEEE library numeric_std and the Synopsys library std_logic_arith. Only numeric_std is part of the official language.
 

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