vhdl34
Newbie level 6
hi im trying to make a mmultilier of 4 bit by 4 bit here under is my code however i have some problems as its not working. it diviide the program in two clock cycles by the state however the program is not changing any type of help is reallyy appreciated thanks
Code:
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_misc.all;
use IEEE.std_logic_unsigned.all;
entity multiply is
port(clk :in std_logic;
multiplicand_in : in std_logic_vector(3 downto 0);
multiplier_in : inout std_logic_vector(3 downto 0);
result: out std_logic_vector(7 downto 0));
end multiply;
Architecture multiply_arch of multiply is
begin
process(CLK)
variable temp : std_logic_vector(7 downto 0):= "00000000";
variable counter : std_logic_vector(3 downto 0) := "0000";
variable state : std_logic:='0';
begin
if (CLK'EVENT and CLK = '1') then
if (counter <= "0100" ) then
if (multiplier_in(0) = '1') then
temp := temp + multiplicand_in ;
elsif(multiplier_in(0) = '0') then
temp := temp +"0000";
end if;
counter := counter + "0001";
multiplier_in <= '0' & multiplier_in(3 downto 1);
result <= temp;
end if;
end if;
end process;
end multiply_arch;