What will be phase margin of single pole system in slow and fast corner?

Hi All,
Please give me some explanation for Phase Margin value in slow and fast corner in single pole system.
How it affects in fast and slow corners?
thanks,
Varun

A single pole system is always stable provided the pole is < 0. Hence the phase margin is -180 degrees.

For eg., consider H(s)=1/(1+s*tau);

Phase margin is the phase in addition that can be added to the phase at the frequency where the gain is unity. i.e., an additional phase shift equal to phase margin can be added to the system so that the system is just stable.

For this system, magnitude response = 1/sqrt(1+w^2*tau^2);

the magnitude is one only at w=0;

which is wgc (gain cross over frequency) => wgc=0;

Phase of the system = -arctan(w*tau);

at w=wpc, phase=0 => phi_gc=0;

Thus, Phase margin = -180 + phi_gc = -180.

This implies clearly that the first order system is always stable.

And "phase margin" is not defined at different frequencies.

It is defined as a parameter of relative stability only at the "GAIN CROSS OVER FREQUENCY"

Hi, rsashwinkumar,

your considerations are trivial since they are based on a 1st order system without gain. Such a system has no "gain cross-over frequency".
For a 1st order system with a maximum gain>0 dB (like an active lossy integrator) the margin can reduce down to only 90 deg.

Varunkant - please explain the meaning of "slow" and "fast" corner, respectively; do you mean low resp. higher pole frequency?

Question whether your "fast" and "slow" models have any
analog relevance even as "corner" cases. Digital, you just
lump "everything bad for speed" and "everything good for
speed" together. But that speed has not much to say about
DC gain in longer channel FETs, resistor sheets, etc. (or,
you don't get to know what, without some digging on your
part).

You might see if you have the facilities for sensitivity
analyses, and try working things individually.

Digital models also aren't always very thorough for gate
resistance, which is significant to MOS caps like you
might use for op amp comp elements in a "digital" flow.
That's a feedback "mystery zero" in a place where folks
tend to want to put an explicit one sometimes.

Corner models are a joke and the joke's on any analog
poor bastage trying to use them for detailed compliance
analysis or limit setting.

LvW said:

your considerations are trivial since they are based on a 1st order system without gain. Such a system has no "gain cross-over frequency".
For a 1st order system with a maximum gain>0 dB (like an active lossy integrator) the margin can reduce down to only 90 deg.

Varunkant - please explain the meaning of "slow" and "fast" corner, respectively; do you mean low resp. higher pole frequency?

Click to expand...

Hi LvW, thank you very much. yes you are right, If gain is not having frequency dependency, it can not have "gain-cross-over freq".
But my query was, the phase margin which is 90 degree at infinite freq, (may be more that that at some frequency ( assumption:take 100 degree at 100 kHz))
- will this PM improves in fast-fast corner compared to typical condition @ Frequency < infinite
- the same reason for slow corner also.
In fact my consideration was for single pole CMOS comperator, that I mention as single pole system.
My intention was just to know the phase margin variation with temperature and process {with fast and slow}