HELP on generating not repetitive numbers (VHDL\SCHEMATIC)

I need some help on a little project, and the objective is to design a sequencial machine simulating a lottery machine or lotto (I don't really know the exact word in english). the point is that I need to generate 4 numbers (4-bits each(hex)) and register them on four 7_segment_dysplay. the problem is not repeating the numbers, how can I do that?, the machine has only three inputs (start,stop,and reset), when started the machine is generating random numbers, when stopped the current number is "poped" and alocated in memory(and most be that way) and displayed on the respective dysplay. The problem: I don't have any method to prevent that this new number has already came out..(maybe with a comparator I don't know)

I know I have to use LFSR to generate "random" numbers but I would like some help in form of vhdl code or schematic design.

I apologize for my poor english and eventually for some inadequate topics, but I really like some help , please.

Thankfully
Flávio Silvestre
flaviosilvestre89@hotmail.com

How random do your numbers need to be? A imagine that a gambling machine with potentially predictable numbers would be a tempting target for cheaters.

An LFSR generates pseudo-random numbers. They are repetitive and predictable, although the sequence can be extremely long. Any purely digital technique will have the same problem. You may want to disrupt the sequence with an unpredictable factor, such as thermal noise or the length of time that the operator holds down the button.

An LFSR is very easy to build. For example, an LFSR with a huge sequence length of 2^63-1 is simply a 63-bit shift register with the last two bits XNOR'ed together and fed back to the input. Here's a nice Xilinx app note:
https://www.xilinx.com/support/documentation/application_notes/xapp210.pdf