barry
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I'm using Quartus Prime Lite and generated a clock buffer IP (using ALTIOBUF). It synthesizes fine in Synplify Pro, but when I try to compile the netlist, Quartus gives the error: "Error (12006): Node instance "clk_buf_altclkctrl_0_sub_component" instantiates undefined entity "clk_buf_altclkctrl_0_sub_0". I've included the file clk_buf.qip in the Quartus project.
My IP is instantiated here:
What's going on? Do I need to include some other file in Quartus? I've got RAM IP instantiated, and that worked fine,with no extra massaging required, but when I added the clock buffer, everything blew up.
My IP is instantiated here:
Code:
//clock buffers
clk_buf CK_MAIN (
.inclk (clk_in),
.outclk (clk)
);
clk_buf CK_SPI (
.inclk (spi_clk_in),
.outclk (spi_clk)
);
What's going on? Do I need to include some other file in Quartus? I've got RAM IP instantiated, and that worked fine,with no extra massaging required, but when I added the clock buffer, everything blew up.