aceyhan
Newbie level 5
Hi,
I'm using the 32nm BSIM4 silicon MOSFET model to make an inverter in this technology. I'm trying to read the input capacitance of this inverter, but if I run a transient analysis and print the capacitance at the input node of the inverter using cap(input node), the values that I get are very different from the publications that I have been reading.
My question is, when I print the nodal capacitance at the input of the inverter, does HSPICE include all the parasitics that the BSIM4 model takes into account, the intrinsic gate capacitances of the nmos and pmos devices and the Miller effect? If not, is there a better way to read all these capacitances correctly than using cap(input node).
I have gone through the BSIM4 manual which explains all the capacitance models that has been used, but I couldn't find the answer to this question.
Thanks in advance.
I'm using the 32nm BSIM4 silicon MOSFET model to make an inverter in this technology. I'm trying to read the input capacitance of this inverter, but if I run a transient analysis and print the capacitance at the input node of the inverter using cap(input node), the values that I get are very different from the publications that I have been reading.
My question is, when I print the nodal capacitance at the input of the inverter, does HSPICE include all the parasitics that the BSIM4 model takes into account, the intrinsic gate capacitances of the nmos and pmos devices and the Miller effect? If not, is there a better way to read all these capacitances correctly than using cap(input node).
I have gone through the BSIM4 manual which explains all the capacitance models that has been used, but I couldn't find the answer to this question.
Thanks in advance.