the difference between simulation and reality

I have designed an audio power amplifier with CSMC 0.5um process. The designed total current consumption is 3.2mA under tt models, but the fab out device measurement result is 2.7mA. I checked the PCM data and found the main parameter such as Vth, Nwell resistor, Poly resistor are all near typical value. So what makes the difference between the simulation result and the actual result?
BTW, all the current in the curcuit are generated by a bandgap PTAT current source, and should have little dependance on the Vth.

the model file is precision or not? this simulation relay on it derectly! and, can you do the post simulation?

i think you mean TSMC instead of CSMC....

the result is different around 15.6%, it's quite big...

but anyway, designer should be happy about it when the leakage is overestimate...

btw, pre-layout sim is not really accurate so you might need to do a post-layout sim (as said by wonbef) to get more real result.....


sp

but anyway, designer should be happy about it when the leakage is overestimate...

Click to expand...

It is the current consumption not the leakage current , as far as I understood.

sorry, my bad...

always think about power consumption = leakage... i was thinking aboout static power...

It's CSMC, which is in WuXi Jiangsu, China. Not TSMC.

Maybe it is due to the layout... i have not done the post layout simulation

hi walker5678,which csmc's .5um cmos process did u choose? I see they only offer 0.6cmos digital mpw at icc shanghai ...

It's 6S05DPTM-ST0100.

First you should do a post layout simulation, at least extracting parasitic resistors.
In your case is also a post diffusion simulation

Mazz

Your die temperature maybe different from what you calculated. Maybe the theta-j of the package is off so the die temperature is lower than what you calculated. Since you are using a PTAT, this will then lower the over all current drain.

If you were not including die temp in your simulation, then you can ignore this input.

You can also look at the lambda parameter or the Id vs. Vds characteristics. Maybe your Id variation over Vds is much better than the models predicted. In addition, go back and calculate the effect of your PCM data on current drain. Even though they are near typical, if your resistors are slightly on the high side of typical, and your Vt is slightly on the low side, both effects combine to decrease current drain.

Actually, I don't think around 15% is a big difference between simulation and real silicon.
First of all, simulation models are some interpolation models so that at one corner, some differences are not uncommon. Model itself can already have 5%-10% difference from some particular situation.
Second, i suppose you didn't run post-layout simulation which should include accurate power transistor RDS, and parasitic resistance of wire in layout, which both affect real output power.
Third, you may not include package model and PCB and testing impedance, which also affect the final DC current
Forth, I think your testing condition should never be the same as the simulation. Say, you do Ta=25 as TT corner, but real chip junction temperature can be as high as 40-50 when under normal condition especially high current driving audio amplifier.
Finally, I think the difference is ALWAYS coming from inaccurate and inadequate simulation modeling from actual real silicon testing environment.

Anyway, 15% is not large, to be honest.

One more thing, i never see an audio amplifier with such low current driving (3mA ??) Looks like even driving an earphone is not enough.

Thank you all for your kind suggestions.

One more thing, i never see an audio amplifier with such low current driving (3mA ??) Looks like even driving an earphone is not enough.

Click to expand...

3mA is the quiescent current consumption of the device when there is no input signal. Actually, the maximum ouput current can be several hundred mA.

Hi walker5678

i am quite interested at your audio amplifier as i am also designing class D audio amplifier. Can we share experience?
What's your architecture and how's your spec?

Hi, hung_wai_ming@hotmail.com

Of course we can. Nice to know you are also designing audio amplifier.
The amplifier is a fully differential structure with rail to rail input and output. It works in Class AB method.

Main specs:
90db open loop gain
Max. ouput power: 3.1W at 10% THD with 3 Ω load.
-80db PSRR
-60db CMRR

Hi walker5678,

Your spec is different from what you told me today.
How come ? haha...
anyway, i think the spec is having room to achieve.
What's your process technologies? It's got to be high voltage, am i right?