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Questions about RFIC design using LC folded inductor source

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electronics_sky

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Help for my design

Hi there,

I am currently designing a LNA by using Si with 0.18um technology. My target is to design an LNA that has NF < 2db, Gain =15db and OIP3 >-3, I<4mA.

I am using a LC folded inductor source degeneration topology. Below are some of my questions:

1. Does folded technique will provide better noise performance than cascode technique?

2. I get a gain of -50dB for my design(i know it is wrong...), could i know what went wrong with my circuit?

3. Any idea how to improve NF of LNA?

4. Does adding a capacitor at Gate-Source terminal at first stage NMOS will help to reduce the NF (especially gate induced noise)?


Thank you in advance.
 

Help for my design

What do NF and OIP mean?

Added after 1 minutes:

Can you provide your topology and some schematic?
 

Re: Help for my design

xjxmn said:
What do NF and OIP mean?

Added after 1 minutes:

Can you provide your topology and some schematic?

NF is noise figure. OIP3 is third order output intercept point.
 

Re: Help for my design

you should check the rfic.com tutorials for lna.
in that they give some ex.
 

Help for my design

some microwave knowledge is neccessary.
for example,adding a capacitor at Gate-Source terminal at first stage NMOS will change the match. then the NF.
 

Help for my design

What!s your power supply?
maybe, this will be limit the usage of the cascode structure..
 

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