Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

20°phase margin enough?

Status
Not open for further replies.
J

jefferson

Junior Member level 3
Joined
Mar 17, 2006
Messages
25
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Location
shenzhen,China
Activity points
1,550
worst case analysis phase margin

Hi, when designing an LDO,is 20° phase margin enough for the whole loop?
I know that a stable loop need 45°-60° phase margin,but it seams that it's not so easy to improve the phase margin.

Regards.
jefferson
 

phase margin over process corners

It should be at 45deg phase margin
 

From NSC's application note,
Stable loops typically require a phase margin of >20° for LDO.
But I think you need keep some margin in design.
 

at least 45 in my opinon.
 

actually, 30 degree is enough.you should ensure the phase margin in worst case is larger than 20 degree.

Added after 2 minutes:

ynhe said:
From NSC's application note,
Stable loops typically require a phase margin of >20° for LDO.
But I think you need keep some margin in design.
Click to expand...


could you upload the "NSC's application note" to me? thanks a lot!
 

but 20 is small ,how can you ensure the system just at the state as the simulated
 

Phase Margin for LDO and dc-dc from NSC.
A stable loop typically needs at least 20°of phase
margin for linear regulators and 40°-45°for switching regulators (more is better).
 

jefferson said:
Hi, when designing an LDO,is 20° phase margin enough for the whole loop?
I know that a stable loop need 45°-60° phase margin,but it seams that it's not so easy to improve the phase margin.

Regards.
jefferson
Click to expand...

I think it's enough for 20 degree if all conditions have been considered such as light load,full load, temperature,process corners and output capacitor and ESRs...

Added after 2 minutes:

ynhe said:
Phase Margin for LDO and dc-dc from NSC.
A stable loop typically needs at least 20°of phase
margin for linear regulators and 40°-45°for switching regulators (more is better).
Click to expand...

can you upload the full material, the file you attached is seemed just 1 page of 34. is that right?
 

thanks for your paper, could you unload the whold paper?thanks a lot!
 

I agree with smartdream's opinion.


B/R
 

20 degree phase margin may be too small. 45 is the resaonable one for real design
 

Due to variation in real circuit components, it's the best to have 60 degree for all corners, to make sure your design is reliable across PVT variation
 

I agree with hung_wai_ming@hotmail.com,
if let's say circuit temperature increases, capacitors increase and it will become some sort of oscillator
 

So the so called "20 phase margin" should be the measurement results instead of simulation results, right?
 

of course, more than 45 degree PM in design in my opinion!

Added after 2 minutes:

ESR is key parameter for your consideration in LDO design, I think!
 

The system stable or not due to your GM even if you PM is 20 degree. show your bode plot......


to jeffsky 520:
happy new year~~
 

It really depends on the application, if you don't want any ring at your output, then 60 is the requirement, if you can live with the rings, 45, 30, even 20 at teh worst case probably O.K.
Remember, sometime, the ring can speed up your circuit a little bit.
 

According to Razavi: at least 60
According the Grey: At least 45
 

the 45 is the design should be get.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top