Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

writing pt script for post layout hold-time analysis

Status
Not open for further replies.
H

hover

Junior Member level 2
Joined
Jun 12, 2004
Messages
22
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,283
Location
China
Activity points
178
Now I am forwarding to post layout hold-time analysis from pre layout sta analysis. In my synthesis script I have set max delay for some pathes but no minimum delay. Now for hold-time should I set minimum delay for these pathes, if I need to set, how to determine the value?
 

hi hover,

for hold time analisys there is no need of setting up any mindelay costaraints. simulator will take the hold time values of each flop from .db

regards,
ramesh.s
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top