KST
Full Member level 2
pic18f2550 unprotect
I am using ICD2 of Microchip and HTPIC18 - MPLAP7.3 (for 18F4550)
My project is very simple, it is set PORTA = 0xAA; PORTB = 0x55;
This is my code:
#include<stdio.h>
#include<pic18.h>
__CONFIG(1,HSPLL & USBPLL & PLLDIV1 & CPUDIV1 & FCMDIS & IESODIS);
// HSPLL = High Speed PLL
// USBPLL = Select USB PLL --> Source CLK tu 96MHz PLL/2
// PLLDIV5 = /1 ~ 4 MHz input
// CPUDIV1 = No divide
// FCMDIS = Disable FCMEN
// IESODIV = Disable change intenal/Extenal OSC
__CONFIG(2,VREGEN & PWRTDIS & BOREN & BORV20 & WDTDIS & WDTPS32K);
__CONFIG(3,CCP2RC1 & PBADDIS & LPT1DIS & MCLREN);
__CONFIG(4,STVREN & LVPDIS & XINSTDIS & DEBUGDIS);
__CONFIG(5,UNPROTECT);
__CONFIG(6,UNPROTECT);
__CONFIG(7,UNPROTECT);
void main()
{
TRISA = 0;
PORTA = 0xAA;
TRISB = 0;
PORTB = 0x55;
}
when I buit all, it is OK but when I program to it, it is not OK. Why ? Can you help me !
This is a picture of the Error !
Thank U for caring !
Mail to me: vienthong@visl.gov.vn
I am using ICD2 of Microchip and HTPIC18 - MPLAP7.3 (for 18F4550)
My project is very simple, it is set PORTA = 0xAA; PORTB = 0x55;
This is my code:
#include<stdio.h>
#include<pic18.h>
__CONFIG(1,HSPLL & USBPLL & PLLDIV1 & CPUDIV1 & FCMDIS & IESODIS);
// HSPLL = High Speed PLL
// USBPLL = Select USB PLL --> Source CLK tu 96MHz PLL/2
// PLLDIV5 = /1 ~ 4 MHz input
// CPUDIV1 = No divide
// FCMDIS = Disable FCMEN
// IESODIV = Disable change intenal/Extenal OSC
__CONFIG(2,VREGEN & PWRTDIS & BOREN & BORV20 & WDTDIS & WDTPS32K);
__CONFIG(3,CCP2RC1 & PBADDIS & LPT1DIS & MCLREN);
__CONFIG(4,STVREN & LVPDIS & XINSTDIS & DEBUGDIS);
__CONFIG(5,UNPROTECT);
__CONFIG(6,UNPROTECT);
__CONFIG(7,UNPROTECT);
void main()
{
TRISA = 0;
PORTA = 0xAA;
TRISB = 0;
PORTB = 0x55;
}
when I buit all, it is OK but when I program to it, it is not OK. Why ? Can you help me !
This is a picture of the Error !
Thank U for caring !
Mail to me: vienthong@visl.gov.vn