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Parasitic Annotation: problem with LVS and net parasitic

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hrkhari

hrkhari

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Parasitic Annotation

Hi Guys:

In an extracted view of a layout, I could simulate the circuit and obtain an accurate result, but my LVS fails indicating multiple stamped layers error. Is there any way in back annotating the net to net parasitic in Cadence without running LVS, if there is not, is there any way, I could get the net to net parasitic in tabulation format, currently I could get tabulated data for the total parasitic on a net, but I'm not really sure whether the parasitic resistance is net to net value or net to gnd value. Please advise. Thanks in advance

Rgds
 

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