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Re: How to reduce the effect of HD3 in delta sigma ADC&#
I think that for most cases its due the amplifier deffective settling due finite GBW, finite DC gain and slew-rate. By improving these parameters the third harmonic in most cases is reduced. Several books and articles provide information on these topics. There are other considerations for harmonics such as DAC mismatch in multi-bit architectures. Let me know if this help.
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