Question on Buffer Design

Guys,

I'm designing a buffer (simple differential amplifier with dual input and dual output) which gives the gain of -2dB. Actually i'm desiging this to work as a attenuater where i want to reduce the voltage swing , let say from a 800mVpp to 400mVpp. So, i would say that is not a gain stage at all.

My question is, when i design this circuit, should the be the drain voltage of the tail transistor to be in saturation? My design is showing that my tail is in triode but it is giving a nice differential signal, but if i want that to be that in saturation, i'm getting somehow a distorted differential signal at the bottom. I guess this could be of the voltage margin limitation at the drain voltage of the tail. Meaning that the tail voltage need to be a low as possible.

So, if i design this buffer in triode, is that ok? because we know that any opamp need to be in saturation (tail) in order to have a constant gain, but the one i design not concenrate on gain.

Pls advise on this.
Thanks in advance,
Suria.

Obviously, you are having sime common mode range issue. If you post your design maybe it would be clear to answer.

Actually, puttin your transistors into saturation make your design more rubust against variations. To make an attenuator, just remember that the gain of your amplifier can be represented by gm.RL. So you can get a nearly constant attenuation factor by puttin in your output stage a diode connected transistor so that its 1/gm be the RL you need.

Hi Humungus,

Thanks for the reply. Well, to define my circuit, it is a simple diff amp with resistive load. I have tried the way you have suggested, that is putting the diode connected mos as load, from the simulation it seems like i'm getting a distortion at the output. My input swing is 1.2Vpp and want to have about 800mVpp output swing. I have tried last time the diode connected load but it gives like a ringing wave on the upper swing. So, when i compare this and the one i design, the swing is far better but the matter is the tail transistor is in triode. So, what will be the disadvantages if it works in triode although it is a attenuater. I did vary my process and temp, it looks ok.

Thanks,
Suria.

The purpose of the common mode current source is for PSRR and common mode rejection, triode region gives a resistive response, whereas saturation mode of operation is a current source response. Hope this helps

Rgds

Having a transistor in triode is not a problem if that is what works for you. But if you want to put it in Saturation, then from your post it seems that when it does go in Saturations the Vgs of the differential pair input transistors becomes less and when the input signal goes on the down side then these transistors go into triode which distorts your signal. What circuit parameter are you changing to pull the tail transistor in Saturation? Whatever it is, maybe you will have to adjust the input common mode to keep the input differential pair in saturation. The input common mode should be Vgs of the differential pair plus whatever Vds you want to set for the Tail transistor in Saturation.

Hi Aryajur,

I'm controlling the gm parameter of the diff amplifier trans & tail tran in order to keep the tail in saturation that is by tuning W of each MOS. I'm not facing problem
in keeping the 2 differential input in saturion coz i can achieve that but my main concern here is about the tail transistor which goes to triode. Actually, i couldn't adjust my input common mode as it need to be fixed from the pre-buffer that is 1200mVpp signal swing with 1.2 as common mode.

Thanks,
suria3

I don't understand how you are controlling the Tail transistor to be in saturation by just adjusting the width, the transistor being in saturation has to be controlled by the Vgs and Vds relationship. And Vgs would be something you bias and Vds would be something that is set by the input common mode and the current in the circuit.
Since you cannot adjust the input common mode, I am sure when you do see the tail transistor to be in saturation and the signal being distorted at the lower end it will be because the input differential pair transistor goes in triode when the input swing goes to its lower extreme. I think you need to check that.

Aryajur,

I agree with what you are telling that to control a transistor to be in saturation, it has to be done through VGS of the particular MOS, but since my VGS at the tail of Diff amp is fixed, so the only parameter that i could change is the ratio of W and L of the tail transistor either to increasse or decrease the drain current which will pull down/up the tail drain voltage. But this is not helping much. The other parameter that i do vary is the load resistor but this limit to certain value since i need the gain to be attuanating. As you mentioned, I could see that when the input diff amp takes the large swing (1.2Vpp) , that 2 transistor is going on to triode region but how do I can control that to ensure that tail transistor to stay in saturation although high swing is there. the tradeoff here is coz the gain is control by A=gmR, in which the value of R is limited to ensure it works in attenuation.

Thanks,
Suria3.

Why can't u wary the Vgs of the tail transistor. I understand that the input common mode may be difficult to vary but Tail transistor's Vgs must be set bya biasing circuit, that should be varied easily. When you are trying to set the Vds by varying the current, it is actually changing because of the changing Vgs of the input differential pair to support the changed current. To make the tail transistor in saturation you have to change its Vgs or change the input common mode. Varying the current is not a good thing becuase current should be decided by more important factors like power consumption of the circuit.
What I would do is decide the current then calculate the maximum Vds that can be allowed of the tail transistor due to the fixed input common mode and then set its Vgs lower than that and then bias it and set its size. And then design the input transistors and the resistors.