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sync reset on async reset pin

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vivek

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hi
how can we give a synchronous reset to the async reset pin of a flip flop?
How will the VHDL or verilog code for a synchronous reset flip flop realised in hardware?
 

1) you can connect the syn reset with the async reset pin of a flip flop directly.
2) any hdl can do it.
 

hi
let me make the query more clear..
i have the flip flop with async reset pin. the reset signal is also asynchrnous. In this case how can i give a synchronous reset to the flip flop.

one way it can work is by giving the reset as the input of another flop and give the output of this flop to the reset pin. Is this a good method or is there any other better way? thanks in advance
 

I think vivek is right, in general, we always use latched reset to resolve async reset pb.
 

use two filp-flops to avoid meta-stability problem.then output to the asyn reset pin of dest flip-flops.
 

I doubt there are two kinds of reset pins, async and sync are the internal logics of the flip flop where it acts, the system has only one reset pin and the functionality may be asyn or syn and as well as the flip flop.

please clear me if iam wron.

regards
 

yes, you can give a synchronous reset to the async reset pin of a flip flop.

in hardware realization. if D is dff's data input, D_IN is data to be input to dff

without synchronous reset, then when you use synchronous reset,

the result logic is D <= D_IN & SYNC_RST_N (active low logic )

vivek said:
hi
how can we give a synchronous reset to the async reset pin of a flip flop?
How will the VHDL or verilog code for a synchronous reset flip flop realised in hardware?
Click to expand...
 

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