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  1. #1
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    how to find processing time of an algoritm in Vivado 2017?

    I developed an algorithm using verilog-hdl in vivado. Now I want to check how long my algorithm will take to process 200 samples without actually dumping it in FPGA kit. So, how to check processing time of a design in vivado software only?

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  2. #2
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    Re: how to find processing time of an algoritm in Vivado 2017?

    The processing time is fixed by algorithm design and doesn't depend on Vivado software.

    Are you talking about a pipelined design that reads one data point per clock cycle or a sequential algorithm processing previously stored data?

    In any case, the processing time can be checked with a function simulation.



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