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  1. #1
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    Question about phase noise simulation using cadence and ADS EM simulation.

    Hi all~

    I'm trying to simulate the phase noise of my VCO and I used EM simulator to extract port to port s-parameters (all ports including IND and MOS,,...) and applied the results to cadence schematics through nport in analogLib.

    PSS/Pnoise results of phase noise in cadence was so bad and it shows difference of more than 10dBc/Hz compared to "only inductor is Em simulated version". Is this natural case?

    Which one do I have to believe. wholly em simulated case? or case of only the inductor is simulated.
    Or am I simulating the phase noise of VCO in incorrect method?

    Thanks!

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  2. #2
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    Re: Question about phase noise simulation using cadence and ADS EM simulation.

    "Wholly EM Simulated" does not make sense at all..
    You can make an EM Simulation for Inductor only then replace EMView into Schematic or Extracted view of the VCO.
    But not whole circuit..



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  3. #3
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    Re: Question about phase noise simulation using cadence and ADS EM simulation.

    Quote Originally Posted by BigBoss View Post
    "Wholly EM Simulated" does not make sense at all..
    Misunderstanding maybe? I know users who like to put a lot of layout into their EM models, not just individual inductors, which makes the model a multiport with many ports. But I have no idea how good Cadence convolution and noise simulation can handle that multiport. One possible issue: there might be some weak coupling (or DC path) in EM results from numerical errors, instead of DC isolation.



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