Humusk
Junior Member level 1
Hello,
As the title states I want to pdate a .mif file without the need of compiling each time. Searching I found this intel link
Here it says that using this I should be able to do what i want:
So I write the following TCL code:
When I tried to execute it, it says:
And now my real problem, I tried to add quartus_map but it's always giving me errors, the last one is this one:
This is the code I added:
And the full error message:
I don't have almost any experience with TCL and with scripting for FPGAs in general.
Thanks.
As the title states I want to pdate a .mif file without the need of compiling each time. Searching I found this intel link
Here it says that using this I should be able to do what i want:
Code:
quartus_cdb --update_mif <project name>
quartus_asm <project name>
Code:
proc tdc_mif_update {} {
set project_name [ get_global_assignment -name TOP_LEVEL_ENTITY ]
set family [ get_global_assignment -name FAMILY ]
set device [ get_global_assignment -name DEVICE ]
exec quartus_cdb --update_mif $project_name
exec quartus_asm $project_name
puts "SiUB (INFO): .mif file updated"}
When I tried to execute it, it says:
Code:
Error:Error (39003): Run Analysis and Synthesis (quartus_map) with revision "magi_fw" for --rev option before running Compiler Database Interface (quartus_cdb)
Code:
Error:Error (12007): Top-level design entity "magi_fw" is undefined
Code:
set family [ get_global_assignment -name FAMILY ]
set device [ get_global_assignment -name DEVICE ]
exec quartus_map $project_name --rev=$project_name --family=$family --part=$device
And the full error message:
Code:
Error:Info: Command: quartus_map magi_fw --rev=magi_fw --family="MAX 10" --part=10M25DAF484I7G
Error:Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
Error:Info (20030): Parallel compilation is enabled and will use 2 of the 2 processors detected
Error:Error (12007): Top-level design entity "magi_fw" is undefined
Error:Error: Quartus Prime Analysis & Synthesis was unsuccessful. 1 error, 1 warning
Error: Error: Peak virtual memory: 566 megabytes
Error: Error: Processing ended: Tue Oct 15 20:55:08 2019
Error: Error: Elapsed time: 00:00:11
Error: Error: Total CPU time (on all processors): 00:00:01
Error:child process exited abnormally
Error: while executing
Error:"exec quartus_map $project_name --rev=$project_name --family=$family --part=$device"
Error: (procedure "tdc_mif_update" line 8)
Error: invoked from within
Error:"tdc_mif_update"
I don't have almost any experience with TCL and with scripting for FPGAs in general.
Thanks.