Operating current in Gate Drivers

1. Operating current in Gate Drivers

I am understanding the datasheet parameters of LM5102. I am not understanding how is operating current measured (average / RMS current ) conditions is given as f=500khz in electrical characteristics
Can any one share some insights on these?
Datasheet: http://www.ti.com/lit/gpn/lm5102

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2. Re: Operating current in Gate Drivers

Hi,

Usually it makes not much sense to measure the current in a DC path as RMS.
Thus I'm rather sure it is "average current".

RMS is useful when you want to calculate power dissipation of any resistive load...where the voltage across the resistor directly is proportional to the current ... and thus the power is proportiona to squared current. P = I^2 × R.
But there you rather want to calculate the power supply. And here P is proportional to I, because Voltage is constant. P = V × I.

Klaus

3. Re: Operating current in Gate Drivers

I have measured operating current at VDD referring application circuit in datasheet. (With condition f=500khz) Whenever there is raising input pulse I observe a current spike at VDD and during falling.
May I know the formula for calculating the average current here and is it dependent on duty cycle?

4. Re: Operating current in Gate Drivers

With sufficient bypassing, you don't see current spikes in the Vdd supply. At the end of the day, you have to supply 2*Fswitch*Qg,total + LM5102 quiescent current on average.

Qg,total can be found in MOSFET data sheet.

5. Re: Operating current in Gate Drivers

Hi,

Yes. Generally you need to decouple (stabilize for current spikes) power supply.
It's a good idea to place a fast ceramics capacitir at each supply pin of each IC....with low impedance connection to the GND plane.

It should be common knowledge, but here it is additionally mentioned in the datasheet:
Section:
5 Pin Configuration and Functions
--> Locally decouple to VSS using low ESR/ESL capacitor, located as close to IC as possible.

Ah, yes, a GND plane should be mandatory for high speed switching (high dV/dt) high current applications.

Klaus

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6. Re: Operating current in Gate Drivers

@FvM 2*Fswitch*Qg,total + LM5102 quiescent current gives - 2*500KHz*43nC(assume)+0.4mA this gives huge value...

https://imgur.com/a/Lhe7gDc

This is the current behavior which i obtain at VDD when input is 500KHz at low side even after i use capacitor at VDD and GND

7. Re: Operating current in Gate Drivers

This gives IDD vs Frequency plot at page no:7 for different Load Capacitor (CL)

How is this plot (Figure no:1) measured/Test Setup on EVM Board (Characterized) and Design Simulation Plot ?

8. Re: Operating current in Gate Drivers

Not sure what's unclear with figure #1? They are measuring average supply current with fixed capacitors in place of the nonlinear gate capacitance.

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9. Re: Operating current in Gate Drivers

How is average supply current measured here test case/formula?

10. Re: Operating current in Gate Drivers

Hi,

Simply a capacitor is used for averaging.

Klaus

11. Re: Operating current in Gate Drivers

Side remark, a bypass capacitor doesn't change the peak current in an ideal supply voltage source without series filter elements, as probably used in your Ltspice simulation. But that's a pure simulation problem. You can easily measure average current in Ltspice, even without using a capacitor.

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