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    OpAmp BW for Feedback loop

    Consider the attached schematics, The switching frequency is 250KHz, So, The cross over frequency be 250/5 = 50KHz. My ADC is 12bit able to sample at 1MS/s.(Ignore any other design spec for now). The doubts are below
    1. For ADC selection-sampling rate the switching frequency should be considered while determining the sampling rate or the Cross over frequency ?
    2. for the buffer used the Bandwidth should be 2 to 5 times the cross over frequency or the switching frequency?
    3. In case i want to use current shunt amplifier for current sensing, How to select from the Bandwidth point of view ?

    In general i wanted to understand how the Opamp parameter be looked at for converter design - unity gain BW, 3db bandwidth etc, used in control loop ?Click image for larger version. 

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    Re: OpAmp BW for Feedback loop

    1) Both. There is guaranteed to be switching frequency noise. Best to oversample above it if possible and higher sample rate means less delay. Don’t forget that.
    2) General ADC good practice is to have an amplifier with higher bandwidth than sample rate for good settling after each sample event.
    3) Is current in the feedback loop? Just remember to take gain bandwidth into account. High gain and high bandwidth may require multiple stages.


    Plan for analog filtering at the switching frequency and then leave that pole out of your digital loop if needed.


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    Re: OpAmp BW for Feedback loop

    The PWM circuit makes no sense as drawn, please review. I guess the µC PWM output should be controlling the switch, not feeding a switch terminal.

    It's necessary to analyze the exact low pass transfer function instead of assuming a theoretical "cross over" frequency. If there are PWM residuals left after the filter, the ADC should be synced with the PWM, otherwise expect interferences and alias signal genertion.

    The final control loop bandwidth will be established by the control algorithm, according to application requirements and hardware capabilities.



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    Re: OpAmp BW for Feedback loop

    Quote Originally Posted by FvM View Post
    The PWM circuit makes no sense as drawn, please review. I guess the µC PWM output should be controlling the switch, not feeding a switch terminal.

    It's necessary to analyze the exact low pass transfer function instead of assuming a theoretical "cross over" frequency. If there are PWM residuals left after the filter, the ADC should be synced with the PWM, otherwise expect interferences and alias signal genertion.

    The final control loop bandwidth will be established by the control algorithm, according to application requirements and hardware capabilities.
    Please treat the schematic as a generic representation. My questions are also more or less to clarify myself on the Bandwidth aspect of the design. please ignore any other specifications for time being



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    Re: OpAmp BW for Feedback loop

    Have you run into any specific tradeoffs yet choosing amplifiers?

    I ask because for what I care about I don't see a lot of hard choices until about 10mhz and up. See OPA192 for example has low offset v/i, RRIO, RFI hardened etc at 10mhz for <$2.



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    Re: OpAmp BW for Feedback loop

    Quote Originally Posted by asdf44 View Post
    Have you run into any specific tradeoffs yet choosing amplifiers?

    I ask because for what I care about I don't see a lot of hard choices until about 10mhz and up. See OPA192 for example has low offset v/i, RRIO, RFI hardened etc at 10mhz for <$2.
    No nothing specific.
    I wanted to understand what would be optimum value to select for a specific scenario - consider the one i have described initially.



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