rob2966
Newbie level 1
Hello all,
I am trying to find a way to interface a DDR style memory (bi-directional, >500MHz/1Gtps) to an Intel Stratix 10 FPGA. The IO voltage of the FPGA can only go down to 1.2V (using the SSTL12 IO standard) and the VDDQ of the memory is 0.6V.
I have been doing a bunch of searching and have so far come up empty on a way to interface these two devices. There are level shifters (from TI, maybe others) that do go down to 0.65V however, they aren't fast enough (and also require a DIR bit, which, although I could probably work with, it is less than ideal).
Any ideas out there on level shifting devices I may be unaware of, or discrete circuits that might help me out.
Thanks
Rob
I am trying to find a way to interface a DDR style memory (bi-directional, >500MHz/1Gtps) to an Intel Stratix 10 FPGA. The IO voltage of the FPGA can only go down to 1.2V (using the SSTL12 IO standard) and the VDDQ of the memory is 0.6V.
I have been doing a bunch of searching and have so far come up empty on a way to interface these two devices. There are level shifters (from TI, maybe others) that do go down to 0.65V however, they aren't fast enough (and also require a DIR bit, which, although I could probably work with, it is less than ideal).
Any ideas out there on level shifting devices I may be unaware of, or discrete circuits that might help me out.
Thanks
Rob
