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Pull down behavior of an NMOS and PMOS

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tenso

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I wasn't sure about my answer for the above question and doing some LTSpice simulation didn't help because of inadequate model files.

As the question says, we have to find the voltage at the source and drain of the NMOS, PMOS respectively when the value of VIN changes. I was hoping someone here could correct me if I am wrong here.

For the NMOS, the highest drain can go is Vin - VTh because at VGS = VTH the device turns off.

For NMOS,
VinVo1
55-VTH
33-VTH
2.52.5-VTH
00

For PMOS
VinVo2
50
35
2.55
05

I am not sure of my answers. For the PMOS, when it is not strongly turned on by Vin = 3 and Vin = 2.5, I am not sure what Vo2 is supposed to be or how it can go
 

Your Mosfet symbols have the arrows backwards compared to most symbols shown in Google. Of many, only one symbol shows what you show and maybe it is backwards.

Mosfets have a wide range of Vgs threshold minimum and maximum voltages. At the threshold voltage, the current is only 0.25mA so it is barely turned on and needs more Vgs to turn on more.
Your N-channel is a "source-follower" so its output voltage is much less than its input voltage.
Your P-channel is common source with voltage gain which is completely different to your N-channel.
 

The symbols are right. You could either show the flow of current with arrows or the actual pn junction formed with the substrate/nwell.
Both representations are common. The current being around .25mA around threshold depends on the MOSFET model. Doubt it is something universal. I am aware that the NMOS is common drain and the PMOS is common source. I am trying to figure out that if the transistors are employed like in pass transistor logic ,what the values of Vo1 and Vo2 would be?
 

Hi,

Without load (current): every tiny (leakage) current will drive the output voltage to VDD.
Thus I don't see the shown circuit as useful measurement method.

Additionally one should know V_g_th and it's according drain current.

Klaus

Btw: You talk about "pull down" behaviour, but there is no "pull down". The Mosfets just "pull high".
 

KlausST said:
Hi,

Without load (current): every tiny (leakage) current will drive the output voltage to VDD.
Thus I don't see the shown circuit as useful measurement method.

Additionally one should know V_g_th and it's according drain current.

Klaus

Btw: You talk about "pull down" behaviour, but there is no "pull down". The Mosfets just "pull high".
Click to expand...

Yes, I made a mistake. The thread title should read pull up behavior of MOSFETs. If a mod could edit the thread title, that would be great. Thanks for taking the time to reply KlausST. If we did have say a capacitor CL as the load how high could the nodes Vo1 & Vo2 go theoretically as a function of Vin and VTH (or is that insufficient information). For a PMOS, what approximately is Vo2 when Vin - 2.5 V and 3 V ?
 

Hi,

Even if you name it "pull up" - it makes no difference with the "load" problem.

***

You are doing a DC test.
And a C is no DC load.

So if there is any leakage current it will go up to VDD.


Klaus
 

KlausST said:
Hi,

Even if you name it "pull up" - it makes no difference with the "load" problem.

***

You are doing a DC test.
And a C is no DC load.

So if there is any leakage current it will go up to VDD.


Klaus
Click to expand...

For the NMOS, it never goes up to VDD, does it? Doesn't the devices turn of when VGS <=VTH, discounting subthreshold conduction?
 

"We" means a school project.
Without having a DC load (a capacitor is not a DC load but it probably has some leakage current) then the N-channel Mosfet conducts less and less as its Vgs rises less than Vth. As soon as you connect a voltmeter to measure how high the source pin rises then the meter becomes the load to ground which reduces the voltage on the source pin.
The P-channel Mosfet is a switch. Its drain goes to the positive supply when the Vgs is Vth or more and its load current is within its capabilities.
 
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    tenso

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Hi,

OK.

I assume you know Ohm's law.

R = V / I.

Or the other way round: V = R x I
V = The voltage you want to know
I = the (leakage) current through the drain or source
R = the load resistance

I is only theoretically zero. In real world it is very low. Only you can know how low, we can't know it...
R is only thereticall infinite. In real world it is very high. Only you can know how high...

Now calculate V = R x I.
In case your calculated value is higher than VDD, then the value of V is limited by VDD..

Klaus
 

Audioguru said:
"We" means a school project.
Without having a DC load (a capacitor is not a DC load but it probably has some leakage current) then the N-channel Mosfet conducts less and less as its Vgs rises less than Vth. As soon as you connect a voltmeter to measure how high the source pin rises then the meter becomes the load to ground which reduces the voltage on the source pin.
The P-channel Mosfet is a switch. Its drain goes to the positive supply when the Vgs is Vth or more and its load current is within its capabilities.
Click to expand...

actually it is not a school project or homework. I was trying to answer a compilation of questions online which was put by someone as a guide to the type of questions asked to undergrads for an Analog Design position. Thanks for the help. If I understood you correctly, my answers are right.
 

You cannot know your output without the load. If your load is super high impedance, then little current is enough to drive it to Vdd.
 

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