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    Desig and Implementation of a CAN IP with FPGA

    Hello everyone,

    At my school we were given this 3 months project, which consists on doing the design and implementation of our own CAN (Controller Area Network) IP (Intellectual Property) with FPGA, then adding the IP to 2 SoPCs (Software on Programmable Chip). And then establishing communication through CAN between the 2 SoPCs.

    After several resarches, we found out that we can't implement all the functionalities, and that if we are to make our own IP, it will be implementing the major functionalities only.

    And that all is about understanding how a CAN Controller and a CAN Transceiver work.

    I am asking for links or advice, that will help us filter the maor functonalities and implement the IP correctly.

    Thanks in advance.

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    Re: Desig and Implementation of a CAN IP with FPGA

    Hi,

    You didn't write what you have done so far.
    Which documents and tutorials did you use?
    There are lots of examples about basic CAN communication. Do a research on your own.

    Try to find reliable sources. That are directly from hardware or software manufacturers or universities.

    Nowadays there is plenty of information in the internet, use it. There are even video tutorials.

    It's not that long ago... there was no internet...

    Klaus
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    Re: Desig and Implementation of a CAN IP with FPGA

    Hello Klaus,

    Thank you for your answer.

    So far, my colleagues and I, we have been trying to understand how the protocol works. we used Vector tutorial for that: https://elearning.vector.com/mod/page/view.php?id=333

    And as the whole protocole is implemented in the Controller and Transceiver, we started with a microchip standalone CAN Controller: the datasheet of the MCP2515 http://ww1.microchip.com/downloads/e.../20001801H.pdf

    Then we tried to search for some existing IPs of CAN, ones that people tried to make,we have got many results:
    https://opencores.org/project/a_vhdl_can_controller
    http://www.asic.co.in/projects/can_f...controller.htm

    What we are trying to do now is study the microchip controller, look at the different IP attempts, and select the block that are repeated, which implement the major functionnalities of the protocol.

    Yasmine.



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    Re: Desig and Implementation of a CAN IP with FPGA

    Hi,

    I just want to find out what´s the problem now.

    After several resarches, we found out that we can't implement all the functionalities,
    Why not?
    I see no reason why you can´t implement the CAN controller into the FPGA.

    ****
    Microchip CAN controller.
    I don´t see much benefit in finding out how this controller work ...and then try to copy its functionalities.

    I´d rather go and study the theory first. It´s not that difficult for a basic system....And I assume your job is to write your own code instead of using foreign code.
    wikipedia gives some basic informations and it also gives links to more detailed informations.
    https://en.wikipedia.org/wiki/CAN_bus
    Very urgent to know about the data frames: Which one to use...and how to create and decode.

    ****
    You need to decide: Do you want to build a multi-master system or a master-slave system?

    Klaus
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    Re: Desig and Implementation of a CAN IP with FPGA

    Hi,

    As beginners, and as the duration for the whole project is 3 months, we thought time won't be enough. We asked some engineers who had experience with CAN, and we were told that it will take a lot of time to respect all the specifications .

    If we took time to understand the protocole theoritically and do the design and code. it will take even more time.

    The purpose of this project is for us to understand CAN more deeply, and work on SoPCs. for me, it's ok if I understood a design and re-do it. then if I had the time, I will try harder to come with the design by myself.

    I know it seems a bit meaningless, but given the overloaded schedule of our school, and the other factors. we should do it the shorter way possible. And still make sure we understand what we do.

    Thanks,

    Yasmine



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    Re: Desig and Implementation of a CAN IP with FPGA

    Hi,

    I don't know what's your task.
    And I don't know whether you have to build a CAN system that can handle all possible communication features, or you have to build a basic CAN system.

    In post #1 I see "...of our own CAN..." and "... establish communication..."
    In CAN there are just 4 message types, and maybe you can just use the "data frame" to establish communication.

    To learn CAN basics it should take only a couple of hours...then you still have 90 days left...for the details and implementation...

    There are many online tutorials. Like this: https://www.kvaser.com/can-protocol-tutorial/
    Did you spent only one single hour to read through such a tutorial?
    ... I see there are about 16 hours from your first post in this thread...

    As already said: I don't know what's your job.
    My recommendation: Don't be afraid about this job, don't overcomplicate things, use the internet ...

    Klaus
    Please don´t contact me via PM, because there is no time to respond to them. No friend requests. Thank you.


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    Re: Desig and Implementation of a CAN IP with FPGA

    Hello,

    you also have an option to use "Pmod CAN shield" (from Digilent). It simplify the comunication with CAN controller by using simple SPI protocol.
    Here is link to it:

    https://reference.digilentinc.com/re...ference-manual

    There is also good tutorial about how make CAN working, at this address:

    http://www.keil.com/appnotes/files/apnt_236.pdf

    Regards


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    Re: Desig and Implementation of a CAN IP with FPGA

    Hello,

    I has forgotten mention that there are free "IP Cores" (made by Digilent) for most of their Pmod modules.

    Here is tutorial, how to add such "IP Cores" to your design (only for Xilinx devices):

    https://reference.digilentinc.com/le...pmod-ips/start

    You can use these "IP Cores" either with Zynq (hard-processor) or Microblaze (Xilinx soft-processor).
    I checked and there is also "IP Core" for Digilent "CAN Pmod" module.

    Just follow given tutorial to use it.

    Regards


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  9. #9
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    Re: Desig and Implementation of a CAN IP with FPGA

    There are so many free CAN IP cores to test.
    Look at OpenCores or just search GitHub.
    FPGA enthusiast!



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