buenos
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Hi,
Is there a way in VHDL to automatically substitute some pre-defined text to simplify code?
I have hundreds of these:
device_status(7+8*24 downto 0+8*24) <= "01000001";
But I would like to define a string like this:
msb = "7+8*"
lsb = "0+8*"
Then write the code like this:
device_status(msb*24 lsb*24) <= "01000001";
or even like this:
device_status(xyz(24)) <= "01000001";
or maybe define a whole list of:
"index_0" = (7+8*0 downto 0+8*0)
"index_1" = (7+8*1 downto 0+8*1)
...
then use it as:
device_status(index_24) <= "01000001";
Is there a way to do such simplification?
Is there a way in VHDL to automatically substitute some pre-defined text to simplify code?
I have hundreds of these:
device_status(7+8*24 downto 0+8*24) <= "01000001";
But I would like to define a string like this:
msb = "7+8*"
lsb = "0+8*"
Then write the code like this:
device_status(msb*24 lsb*24) <= "01000001";
or even like this:
device_status(xyz(24)) <= "01000001";
or maybe define a whole list of:
"index_0" = (7+8*0 downto 0+8*0)
"index_1" = (7+8*1 downto 0+8*1)
...
then use it as:
device_status(index_24) <= "01000001";
Is there a way to do such simplification?