adancy24
Newbie level 2
Hello,
I am working on the chip level design using the GF BiCMOS 130 nm technology. I've run into DRC errors when trying to connect the bondpad to the chip guardring. If anyone as any experience with this, please let me know.
Added details:
1) The schematic symbol for the bondpad has three terminals: in, sx, and gp. I have connected "in" to the signal, "sx" to a single subc device and "gp" to ground for all 40 pins. My circuit has separate analog and digital grounds.
2) My circuit does not use ESD protection
3) Thus far, I have connected the backplane metal M1 of the bondpad to M1 of the chip guardring for all 40 pads.
4) I have removed crackstop
Thank you in advance!
I am working on the chip level design using the GF BiCMOS 130 nm technology. I've run into DRC errors when trying to connect the bondpad to the chip guardring. If anyone as any experience with this, please let me know.
Added details:
1) The schematic symbol for the bondpad has three terminals: in, sx, and gp. I have connected "in" to the signal, "sx" to a single subc device and "gp" to ground for all 40 pins. My circuit has separate analog and digital grounds.
2) My circuit does not use ESD protection
3) Thus far, I have connected the backplane metal M1 of the bondpad to M1 of the chip guardring for all 40 pads.
4) I have removed crackstop
Thank you in advance!