promach
Advanced Member level 4
For **broken link removed** ,
1) Why would CMOS inverter performs poorly in terms of supply noise rejection ratio ? Could anyone explain maths equations ?
2) Could anyone elaborate on this statement "The output resistance is a good measure of the sensitivity of the gate in respect to noise induced at the output, and is preferably as low as possible" ?
3) Could anyone suggest a good circuit methodology to measure the output resistance of CMOS inverter ?
1) Why would CMOS inverter performs poorly in terms of supply noise rejection ratio ? Could anyone explain maths equations ?
2) Could anyone elaborate on this statement "The output resistance is a good measure of the sensitivity of the gate in respect to noise induced at the output, and is preferably as low as possible" ?
3) Could anyone suggest a good circuit methodology to measure the output resistance of CMOS inverter ?