paulr127
Junior Member level 1
Hi everyone
I need to test a design which has Xilinx SMPTE SDI Core which had HD-SDI interface..... It goes to rest of the components....
I am not conversant with it.
I have been asked to mimic that interface in my testbench and use the signals coming out of it as an input to test other components in the design.
I have not done that before. What does this mean and how do I mimic this interface and use it signals to test other components to the design to which it is connected to...
If anyone can tell me how do I do that please
Many thanks for your help
I need to test a design which has Xilinx SMPTE SDI Core which had HD-SDI interface..... It goes to rest of the components....
I am not conversant with it.
I have been asked to mimic that interface in my testbench and use the signals coming out of it as an input to test other components in the design.
I have not done that before. What does this mean and how do I mimic this interface and use it signals to test other components to the design to which it is connected to...
If anyone can tell me how do I do that please
Many thanks for your help