promach
Advanced Member level 4
After some math, it can be shown that the minimum delay is achieved when the load is driven by a chain of N inverters, each successive inverter ~4x larger than the previous; N ~ log4(Cload/Cin)
In the absence of parasitic capacitances (drain diffusion capacitance and wire capacitance), the result is "a fan out of e" (now N ~ ln(Cload/Cin))
For https://en.wikipedia.org/wiki/FO4 , could anyone help to derive the above two equations under different conditions ?