nsgil85
Member level 4
Hi evryone
I need to simulate 73Mhz clock, 50% DC, then i wrote this procedure:
The output for it is round number, any suggestions for simulate 73Mhz clock
Best
Gil
I need to simulate 73Mhz clock, 50% DC, then i wrote this procedure:
Code:
procedure cgen(signal clk : out std_logic; constant FREQ : real) is
constant P: time := 1 sec / FREQ;
constant HIGH_T : time := P/ 2;
constant LOW_T : time := P- HIGH_T;
begin
loop
clk <= '1';
wait for HIGH_T;
clk <= '0';
wait for LOW_T;
end loop;
end procedure;
Best
Gil