dzafar
Member level 4
Hello there,
I have a question regarding ARCHITECTURES in VHDL.
1. Can processes be used along with concurrent signal assignments under the same architecture?
I think yes, please let me know if otherwise.
Also,
2. Are processes behavioural or structural?
No clue about this one.
Thanks in advance
I have a question regarding ARCHITECTURES in VHDL.
1. Can processes be used along with concurrent signal assignments under the same architecture?
I think yes, please let me know if otherwise.
Also,
2. Are processes behavioural or structural?
No clue about this one.
Thanks in advance