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    What is open drain/open collector and Push pull Configuration..??

    Hello Guys

    I might be a foolish person to ask here but seriously i dont know what is the Open drain/open collector..??

    Interviewer asked me if you are using controllers and if you dont know then you just did nothing work

    I want to understand it in deeper way, i know it is very useful in hardware design perspective.

    Thanks
    Marx

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    Re: What is open drain/open collector and Push pull Configuration..??

    Open-drain - An open-drain or open-collector output pin is driven by a single transistor, which pulls the pin to only one voltage (generally, to ground). When the output device is off, the pin is left floating (open, or hi-z).

    check this site:https://akhiljain07.wordpress.com/op...configuration/



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    Re: What is open drain/open collector and Push pull Configuration..??

    Hi Bjtpower,

    The output of some logic gates is designed to either sink the current or source it. It can do only one of these two. For example, consider a common-source stage with an n-MOS transistor which has a load resistance RL. You can assume this to be a NOT gate. If you apply vdd to the gate of this transistor, it can make the output transition from high to low; however, the transistor itself cannot make the output go to vdd. This second action is achieved by means of the RL. Since some times this pull-up resistor is not included inside the chip (microcontroller, a simple logic gate, or whatever) and the drain of the transistor is open, that's why they call it an open-drain configuration.


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    Re: What is open drain/open collector and Push pull Configuration..??

    The open collector /open Drain configuration deals about the way the ICs output is configured.

    In open collector configuration , the output transistor collector terminal is brought out to the ICs pin .
    You can connect a load to it to a higher volatge than the maximum Ic voltage.

    In Open drain , the output MOSFET Drain is left open and connected to terminal of IC.


    Normally the collector/drain in output of drivers are internally connected to make it HIgh or Low.
    Whereas , in open collector(/drain) , it is not connected to Supply internally but brought out to external pin.


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    Re: What is open drain/open collector and Push pull Configuration..??

    What we can achieve by doing this..??

    The same can do it with the Push-Pull Configuration..???



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    Re: What is open drain/open collector and Push pull Configuration..??

    OD/OC often used for wired-AND when several IC outputs are connected together (I2C is an example). In case of push-pull configuration if one output is HIGH and the second is LOW, you'll have a short between Vcc and GND and dead ICs.
    But OD/OC has lower current-source capability compared to push-pull. The output configuration depends on the application you need.
    If the pin is only driving simple LED (pin in sinking), there will be almost no difference between push-pull and OD/OC.



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    Re: What is open drain/open collector and Push pull Configuration..??

    One advantage of the open-drain outputs is that you can connect the output of several open-drain gates together to form a so-called wired-AND gate. If the output of all of these gates is high, the overall output remains high through the pull-up resistor; however, when one of these outputs goes low, the overall output will be low via the current sunk by the corresponding transistor. With other logic types, a similar circuit may lead to a short circuit.

    Moreover, with open-drain gates we can specify the high level of the output by connecting the pull-up resistor to the desired vdd value. This is particularly helpful when interfacing different logic types which are based on different high values.


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    Re: What is open drain/open collector and Push pull Configuration..??

    Can one give me example how one can Connect several devices using open drain/collector and push pull.??



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    Re: What is open drain/open collector and Push pull Configuration..??

    For example, consider the cascode of two n-mos devices where the drain (which is the also the output of the gate) is connected to a load resistance of RL. Assuming that the gate of these two devices are A and B, the output will be (A NAND B). Now suppose that we add another transistor. The drain of this new transistor is connected to the output, the gate to C and the source to ground. The overall output will be [NOT( (A AND B) )] AND [NOT(C)]. The wired-and that I mentioned previously...
    Last edited by mahdi3999; 17th April 2017 at 10:28.



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