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Using a FPGA board as storage

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minho_ha

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Can I use FPGA board as a storage, which is communicating with host PC through PCIe??

I wanna check PCIe core signals using Xilinx Chipscope, when I write and read data between FPGA board and PC.

Is it possible?
 

minho_ha said:
Can I use FPGA board as a storage, which is communicating with host PC through PCIe??

I wanna check PCIe core signals using Xilinx Chipscope, when I write and read data between FPGA board and PC.

Is it possible?
Click to expand...

Yes. Almost of the dev boards come with a DDR Memory shared with PCIe (you can do that in your design) so that your PCIe host can directly write data to the DDR. You can check PCIe signals using probes, but that uses your FPGA internal memories to store dump
 

xtcx said:
Yes. Almost of the dev boards come with a DDR Memory shared with PCIe (you can do that in your design) so that your PCIe host can directly write data to the DDR. You can check PCIe signals using probes, but that uses your FPGA internal memories to store dump
Click to expand...

Can I use a BRAM (Block RAM) as a storage?? If I use DDR memory, I should use MIG, which is compliated, i think.
 

minho_ha said:
Can I use a BRAM (Block RAM) as a storage?? If I use DDR memory, I should use MIG, which is compliated, i think.
Click to expand...

Yes, you can use BRAM. But it is limited. What type of storage do you expect?. Store receive data and read it through Chipscope?.
 

xtcx said:
Yes, you can use BRAM. But it is limited. What type of storage do you expect?. Store receive data and read it through Chipscope?.
Click to expand...

For example, in Ubuntu environment, copy the data from one directory to FPGA BRAM stroge and then read a signal changes through Chipscope.

I just wanna watch what changes are happened.

Are u think it is possible?
 

In principle, yes!
But I think you are limited by the amt of data read from the PC and your FPGA capacity (you have provided no info on these)!
 
minho_ha said:
For example, in Ubuntu environment, copy the data from one directory to FPGA BRAM stroge and then read a signal changes through Chipscope.

I just wanna watch what changes are happened.

Are u think it is possible?
Click to expand...

Unless you build it, the memory on the FPGA has no file system. So you only store files and folders at the raw byte level.
Brams are quite small - you will only have a few MBytes of storage if you use all of the BRAM on the FPGA.
 

TrickyDicky said:
Unless you build it, the memory on the FPGA has no file system. So you only store files and folders at the raw byte level.
Brams are quite small - you will only have a few MBytes of storage if you use all of the BRAM on the FPGA.
Click to expand...

Of course i will generate the bitstream and program it. After that should i mount FPGA board like HDD?? Or is there any other method to mount the FPGA board??
 

minho_ha said:
Of course i will generate the bitstream and program it. After that should i mount FPGA board like HDD?? Or is there any other method to mount the FPGA board??
Click to expand...

You will need to add some sort of PCIe interface in your FPGA - with logic to respond to the read and writes.
On the PC end - you'll need to write a driver to talk to the FPGA board. its not as simple as just plug and play.
 
TrickyDicky said:
You will need to add some sort of PCIe interface in your FPGA - with logic to respond to the read and writes.
On the PC end - you'll need to write a driver to talk to the FPGA board. its not as simple as just plug and play.
Click to expand...

Thanks a lot.

I add PCIe integrated core in FPGA. But, in PC side, there is no driver what you mentioned.

I just guess that if i allocate BRAM in FPGA, it is similar to HDD and just need mount process. But when i use 'fdisk', there is no FPGA storage what i want.

Anyway, you're answer help me a lot.
 

minho_ha said:
I just guess that if i allocate BRAM in FPGA, it is similar to HDD and just need mount process. But when i use 'fdisk', there is no FPGA storage what i want.
Click to expand...
Because you have to write a low level driver not just say....
minho_ha said:
I add PCIe integrated core in FPGA. But, in PC side, there is no driver what you mentioned.
Click to expand...
Yeah, there isn't one yet because you have to write it first.

- - - Updated - - -

BTW, the reality is that PCIe is more complicated to get working than say implementing the example design for a DDR2/3 controller (post #2 & #3) or just using the DDR2/3 controller with your own user code.
 

minho_ha said:
Thanks a lot.

I add PCIe integrated core in FPGA. But, in PC side, there is no driver what you mentioned.

I just guess that if i allocate BRAM in FPGA, it is similar to HDD and just need mount process. But when i use 'fdisk', there is no FPGA storage what i want.

Anyway, you're answer help me a lot.
Click to expand...

I'm still not clear with your question. Both DDR and PCIe IPs are not as easy as it sounds, as said by others. Esp in RTL design. Also you need a file system to do copy/paste stuff from ubunto to your FPGA storage.

There is one way to handle this with ease (but still that needs effort). Use a soft processor "Microblaze" which can handle the DDR memory and PCIe through AXI bus. You might also get APIs for that on web (I hope). Using that you can write c program to execute these. However this way it will keep you away from RTL work as well. I had worked with DDR in microblaze, but PCIe...nope.
 

Some companies sell FPGA eavluation boards with PCIe interface. They provide RTL code (may be encrypted) for the PCIe controller in the FPGA.
Some FPGAs now have PCIe hard cores. I did not use them but I think you may find good tutorials online.
 

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