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Using higher bias current for input transistors

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vistapoint

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bias current design

I found in Johns&Martins's book the folded cascode amplifier uses higher bias current for input transistors than those of the cascode transistors(Ia>Ib). Is it a design flaw?

If the input signal is large one branch will suck in large current from the cascode transistors so that they will be out of saturation?
 

Re: bias current design

It does not look like a design flaw .To get higher Gm input mos needs more current .To achive higher Ro for cascode pair needs lower current .

If input signal is large then what will happen is drain voltage drops but in design one has to take care that Vd>Vg-Vt for a given common mode/DC input voltage to ensure the NMOS is in saturation .

Folded cascode consumes more power than telescopic cascode but the output voltage swing is higher in folded cascode .
 

Re: bias current design

When input is large, let's say the largest, one side input transistor alone will take Ia while another one will shut off. This increase of Ia/2 means decreas of Ia/2 on the cascode side. If Ib<Ia/2, then the cascode transistors will be out of sat.
 

Re: bias current design

You have to optimize for high Gm and high A. Therfore Gm= 2* Ids/(Voverdrive). For A ~ Gm*rds. For high rds in cascode it's better to have less current flowing through branch b. That's the deal.
 

Re: bias current design

don't understand. if there is no current, the transistors die. Then there is no need to talk about gain. I mean if Ib is drained close to 0 when input is 0.1V, then the circuit surely won't work if input is 0.2V. Where can the input transistor get current from?

In Huijsing's book he suggests Ib=1.5Ia. In Razavi's book he uses Ib=Ia.
 

bias current design

Apart from large signal work mode, all the transistors should not run out of the saturation mode. So what you said about the zeroing current doesnt exist this situation. That is, the input signal cant be too large to drive anyone of the input pairs into shutting off.
 

Re: bias current design

The reason why it's 'folded' is we need large input swing. So I assume there will be 'large signal mode'.
 

Re: bias current design

Will it be possible that Ib means the bias current of the lower six transistors in the cascode stage? Then it make sense Ia>Ib.
If Ib is the bias current of the upper two transistors, then Ia>Ib is impossible I think
 

bias current design

If Ib<Ia, that means only a smaller differential input can be applied to this cascode opa.
 

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