random_duck
Newbie level 4
Ok, so assume I have two or more variables like this:
shared variable char_one : std_logic_vector(7 downto 0); -- ASCII character one.
shared variable char_two : std_logic_vector(7 downto 0); -- ASCII character two.
...
...
I am trying to figure out, how I can possibly output the values of these variables on an output pin (signal, std_logic_vector(7:0)) sequentially, one after the other, provided a certain signal is currently high.
I guess a FIFO buffer might work, but surely there must be a simpler way? I am a beginner to VHDL, but truly puzzled at the moment.
Thanks. :smile:
shared variable char_one : std_logic_vector(7 downto 0); -- ASCII character one.
shared variable char_two : std_logic_vector(7 downto 0); -- ASCII character two.
...
...
I am trying to figure out, how I can possibly output the values of these variables on an output pin (signal, std_logic_vector(7:0)) sequentially, one after the other, provided a certain signal is currently high.
I guess a FIFO buffer might work, but surely there must be a simpler way? I am a beginner to VHDL, but truly puzzled at the moment.
Thanks. :smile: