Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Help with layout of CMRF8SF with Mentor

Status
Not open for further replies.

jpCRC13

Newbie level 1
Joined
Apr 20, 2015
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
8
hello, i'm new with analog design with this pack of ibm and i have a trouble that i can't solve.

I'm doing a simple inverter with Mentor Graphics in this technology and in the schematic i put the subc for the NMOS, but i don't have a contact for the substrate of the PMOS, and when i do the DRC, this is an error message that shows up, i prove to do the contact for myself and this fix the error but i have read that this is not a good design practice. Wha do you say??

And i have another doubt which is the correct interconection of the subc contact with the NMOS transistor??

Thanks.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top