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How to implement a Cache controller?

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davyzhu

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Hello all,

How to implement a Cache controller for general CPU? And is it like a CAM(content addressable memory) ?

DAVY
 

only when you need to implement a fully associative cache, you need CAM, with pure synthesis, you can not support a big CAM with reasonable speed.

set assciative cache is usualy used in CPU. please refer some computer architecture book for detail.
 

hi,
yes, it's better to implement a cpu if you have CAM. but as I know, CAM is expensive IP and there is no free as I know until now.
so, we have to use two rams which used for data and tag to implement CAM, but this need more cycles to finish one cache operation.
Best Regards
 

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