matte87
Member level 1
Dears,
I would like to implement an IO expander capable to communicate with a microcontroller via I2C. The requested number of IO is 80 and I was thinking to implement such component using a CPLD/FPGA. The MachX02 by Lattice provides hardened I2C ports which makes this device suitable for this kind of application. They also provide a reference design as starting point.
However, since I have been using Xilinx CPLD so far, I was thinking to implement the I2C an IO expander on a xilinx CPLD. However, I read that many people after implementing the I2C state machine,they ended up having no more resources for the user logic. Should I go for an FPGA instead of a CPLD?
What are your suggestion about?
Many thanks
I would like to implement an IO expander capable to communicate with a microcontroller via I2C. The requested number of IO is 80 and I was thinking to implement such component using a CPLD/FPGA. The MachX02 by Lattice provides hardened I2C ports which makes this device suitable for this kind of application. They also provide a reference design as starting point.
However, since I have been using Xilinx CPLD so far, I was thinking to implement the I2C an IO expander on a xilinx CPLD. However, I read that many people after implementing the I2C state machine,they ended up having no more resources for the user logic. Should I go for an FPGA instead of a CPLD?
What are your suggestion about?
Many thanks