Delta-Sigma DAC - Is the interpolation filter necesary?

Hi,

This is my first post on here, wasn't sure if this was better suited in this forum or the FPGA forum, please move if appropriate. I'm in the progress of developing a S/PDIF input Delta Sigma audio DAC on a Spartan 3E 500k FPGA. I have completed the S/PDIF receiver and works well with a very simple 8-bit first order delta sigma modulator but now I need to progress the DAC to something better, hopefully surpassing the 96dB SNR for 16 bit audio.

I have done a lot of reading up on the subject, I have the highly recommended "Oversampling Delta-Sigma Data Converters: Theory, Design, and Simulation" from my University's library. I feel reasonably comfortable the delta sigma topology but my understanding breaks down when it comes to the interpolation used in every paper I've read about delta sigma DACs. Essentially, I don't understand why the input to the modulator can't just be held for the period of one sample, so for example, 128 clock cycles, and then changed at the next sample. Why the need for interpolation?

I realise that there will be a reason why every paper I read uses one but I can't figure it out, any hints or tips to help me get my head around this would be greatly appreciated.

Thanks,
Tom

Are you referring to the digital interpolation filter before the modulator (usually 1-Bit for audio applications) or the analog reconstruction filter at the output?

Thanks for your reply. It's the digital interpolation filter before the modulator, as shown in figure 1 of this paper **broken link removed**

Tom

The interpolation filter is a mandatory part of any SD DAC, implementing the oversampling principle. Without it, you get just 1 Bit DAC resolution. I guess you should review the principle theory chapter of Schreier et al once more. I have the book and can confirm that it's explaining the SD stuff thoroughly.

Just had a look and I can get the book electronically for free on IEEE Xplore so I will delve into that and hopefully clear up my confusion, I think I may be looking at the concept rather primitively at the moment.

Thanks for your help,
Tom

Without diving to deep into SD theory, with oversampling you are trading sampling rate against signal resolution. I think, it's very obvious that switching an arbitrary number out of 64 1 Bit samples gives at least 6 additional bits of resolution. But there's a thing called noise shaping which gives a much higher resolution, or more exactly named noise free dynamic range for a limited frequency band of interest. If you are working on the SD field, you should try to get the basic idea of noise shaping.