frankqt
Member level 4
I am building an optical OOK (On off Key Ring) system without a carrier frequency. [However I have a guard time in between symbols, so a consecutive "1" messages will result in a pulse train as opposed to DC, see image]. Essentially, the presence of signal indicates one and lack of it indicates zero. I have a precise clock that is syncs the receiver with transmitter. The system operates with a low SNR and I like to improve SNR using DSP techniques.
I have a few questions:
I do selective sampling in my hardware, in other words, I do not continuously sample the channel but only sample when the probability of seeing the signal is maximum (i.e. this is a light pulse, I time the ADC such that ADC samples at the end of the pulse where I know the whole analog chain is stabilized).
This is particularly a low signal system and primary noise sources are shot noise, johnson noise and amplifiers internal noise.
I now use a simple threshold comparison in software to determine if the data is one or zero. Is there a better way? I have thought of some options but I like to hear from the experts.
So far I have considered the following options:
* Do continuous ADC and try to integrate during rise time:Not entirely sure on the benefit (There may be other benefits, I don't know).
* Matched filter in software: Don't really understand the math but based on what I read, a possibility
* Sample during the guard time and subtract this from the signal ADC value (This may provide some further details but also not so sure, guard time would be the noise measurement)
* Change hardware to a synchronous decoder, costly, time consuming and may not work well since my data rate is fast and getting a synchronous demodulator would mean expensive board since I have to built a multi-MHz carrier frequency system.
I have a few questions:
I do selective sampling in my hardware, in other words, I do not continuously sample the channel but only sample when the probability of seeing the signal is maximum (i.e. this is a light pulse, I time the ADC such that ADC samples at the end of the pulse where I know the whole analog chain is stabilized).
This is particularly a low signal system and primary noise sources are shot noise, johnson noise and amplifiers internal noise.
I now use a simple threshold comparison in software to determine if the data is one or zero. Is there a better way? I have thought of some options but I like to hear from the experts.
So far I have considered the following options:
* Do continuous ADC and try to integrate during rise time:Not entirely sure on the benefit (There may be other benefits, I don't know).
* Matched filter in software: Don't really understand the math but based on what I read, a possibility
* Sample during the guard time and subtract this from the signal ADC value (This may provide some further details but also not so sure, guard time would be the noise measurement)
* Change hardware to a synchronous decoder, costly, time consuming and may not work well since my data rate is fast and getting a synchronous demodulator would mean expensive board since I have to built a multi-MHz carrier frequency system.