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Differential demodulator design

imrankhanPNU

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Hello everyone,
I am designing LPF based differential demodulator(LPF_DDM) to retrieve differentially modulated signals, which are on-chip capacitive isolated [shown]. LPF_DDM includes a differential amplifier, LPF, and Schmitt trigger. I designed a two-stage opamp [specification below], as a differential amplifier. Simulation results of the 2-stage opamp matched with desired specifications (GBW, Phase margin, gain, etc ). However when the differential modulated signals are given as input, then opamp does not work.
Is my 2-stage opamp design and/or design parameters adequate for differential modulated input signal?

Thanks.

Design Parameters:
Input common mode range: ICMRmax = 4V; ICMRmin = 1.5V ; Load capacitance =2pF ; Gain = 1000/60db ; Slew-rate (SR) = 20v/usec. GBW=30MHz
Phase margin (PM)>= 60-degree
 

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  • Schmatics of 2-stage Opamp.JPG
    Schmatics of 2-stage Opamp.JPG
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  • Simulation result of 2-stage Opamp.JPG
    Simulation result of 2-stage Opamp.JPG
    122.3 KB · Views: 20
  • Result when diffenentail signal is given as input.JPG
    Result when diffenentail signal is given as input.JPG
    134.5 KB · Views: 19

FvM

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The role of the shown OP in your demodulator design isn't clear, It would be helpful to see an overall diagram.

Obviously the OP input is completely overloaded with this high level signal. Also you are operating the amplifier as comparator (no negative feedback), why you have frequency compensation?
 

imrankhanPNU

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The role of the shown OP in your demodulator design isn't clear, It would be helpful to see an overall diagram.

Obviously the OP input is completely overloaded with this high level signal. Also you are operating the amplifier as comparator (no negative feedback), why you have frequency compensation?
Thanks, @FvM for your yesponse. The figures attached will give an overall idea of what I want to do ultimately.
I understand that the input is high, but I cannot lower it because of the design requirement (message signal is 5V). Any suggestion to demodulate this diff signal with the magnitude of 5V?
 

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FvM

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Unlikely that you have 5V signal after the capacitive barrier. And you need for a DC bias circuit at the amplifier respectively comparator input.

Still unclear how the demodulation works, the OP is only for amplification and common mode suppression.
 

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